Motor speed control using a fault tolerance implementation on SRAM-based FPGA

  • El Habib Bensikaddour Satellite Development Center Oran, Algeria
  • Aissa Boutte Satellite Development Center Oran, Algeria
Keywords: Microblaze Softcore;, dependability, critical-safety applications, Three Modular redundancy

Abstract

DC motor speed control is a critical task in many applications, such as industrial automation, aerospace and robotics. To ensure reliable and robust performance, a fault tolerance implementation is necessary. In this paper, we present a DC motor speed control system using an SRAM-based Field-Programmable Gate Array (FPGA) with a fault tolerance implementation. The control system utilizes a Pulse Width Modulation (PWM) and Proportional Integral Derivative (PID) to regulate the voltage applied to the motor. To ensure the reliability of the system, a MicroBlaze Triple Modular Redundancy is implemented, in which multiple controllers control the motor in parallel and their outputs are compared. The results show that the implementation significantly improves the reliability and robustness of the DC motor speed control system.

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Motor speed control using a fault tolerance implementation on SRAM-based FPGA
Published
2023-12-28
How to Cite
1.
Bensikaddour EH, Boutte A. Motor speed control using a fault tolerance implementation on SRAM-based FPGA. Alger. J. Eng. Technol. [Internet]. 2023Dec.28 [cited 2024Jun.13];8(2):302-8. Available from: https://jetjournal.org/index.php/ajet/article/view/301